Si wafer preparation

Wafer lapping.jpg

After slicing, the silicon wafers are lapped on both sides to remove the surface silicon damaged by the saws (e.g. fine grooves by the ID Saw). Several wafers are lapped at the same time, in between two counter-rotating cast plates by a slurry consisting of alumina abrasive grains with a defined size distribution. During the lapping, the smoothness and the flatness of the wafers are improved. For example, the Total Thickness Variation (TTV) obtained during this process is closed to 1 µm.


Like all mechanical operations, lapping misplaces atoms to a depth of several micrometers and damages the crystal structure. This layer of subsurface damage is removed chemically by etching resulting in a surface, which is crystallographically flawless.

Either basic or acid etching can be performed at Sil’tronix Silicon Technologies depending on the final aspect and required roughness of the backside generally not polished. To obtain a reproducible result, before etching, we realize ultrasonic cleaning and a short time etching to remove all particles, organic or inorganic films from the wafer surface.


CMP (Chemical Mechanical Polishing) is the final removal step in manufacturing silicon wafers. This process allows to attain the super-flat, mirrored surface with a remaining roughness on atomic scale.

Two steps are used for silicon wafers: “Pre-polishing” (stock removal) end “Final Polishing”

The “Pre-polishing” process generates the required geometrical properties of the wafer. Two polishing processes are possible:

SSP (Single Side Polishing)

Only one face is polished, the second one named backside is etched

DSP (Double Side Polishing)

Both faces of the wafer are polished. This process is suitable when high flatness is required

The “Final Polishing” process generates the final roughness of the wafer. With the standard process the RMS (Root Mean Square) is closed to 5 Å. If needed, we can perform  a specific “final Polishing” process to obtain a RMS less than 3 Å.



After the wafers have been polished, they go through a cleaning process. This step not only removes particles but also “resets” the oxide at the surface of the wafer. With fluorhydric acid, we remove first of all the silicon oxide at the surface (slurry waste and native oxide). With chemical reaction combining oxygen and base or acid, we form a controlled oxide layer on the top of the wafer.

We perform also a brushing process to remove all the particles at the surface of the wafer. If needed, we can also propose an “Epiready” surface and perform a specific chemical reaction. Since the wafer surface is critical, each wafer undergoes a thorough inspection.


Wafer reclaim:

For test applications or mechanical set ups in microelectronics fabs, it can be interesting to reclaim some batches of wafers. With chemical, mechanical and grinding processes, we can remove classical deposition on silicon wafers. With our polishing and cleaning processes, we can obtain the same surfaces quality as for virgin wafers.

For wafers already processed on the front side with high tech devices and connecting plots, we are able to polish the back side without disturbing the opposite side.This back side is ready for bonding on silicon or glass.


Silicon wafer stock


Silicon wafer configurator


SOI wafer configurator



Brochure Silicon wafers.pdf application/pdf

Brochure Thin silicon wafers.pdf application/pdf

Brochure Additional layers.pdf application/pdf

Brochure Services.pdf application/pdf